<!– SPDX-FileCopyrightText: 2026 Ahmed Imamović SPDX-FileCopyrightText: 2026 Tarik Hamedović SPDX-License-Identifier: CC-BY-SA-4.0 –>

uberclock_csrs

This module defines the software-visible CSR bank for the UberClock DSP block.

class uberclock_soc.uberclock_csrs.UberClockCSRBank(*args: Any, **kwargs: Any)[source]

Bases: LiteXModule

PHASE_WIDTH = 26

MAG_WIDTH = 12

GAIN_WIDTH = 32

SAMPLE_WIDTH = 16

FINAL_SHIFT_WIDTH = 3